{"id":22718,"date":"2024-02-14T14:47:51","date_gmt":"2024-02-14T19:47:51","guid":{"rendered":"https:\/\/a2globalelectronics.com\/?p=22718"},"modified":"2024-02-14T14:47:55","modified_gmt":"2024-02-14T19:47:55","slug":"demystifying-3d-integrated-circuits-the-next-generation-of-semiconductors","status":"publish","type":"post","link":"https:\/\/a2globalelectronics.com\/ja\/defense-aerospace\/demystifying-3d-integrated-circuits-the-next-generation-of-semiconductors\/","title":{"rendered":"Demystifying 3D Integrated Circuits: The Next Generation Of Semiconductors"},"content":{"rendered":"\n[et_pb_section fb_built=”1″ _builder_version=”4.16.0″ _module_preset=”default” global_colors_info=”{}”][et_pb_row _builder_version=”4.20.2″ _module_preset=”default” module_alignment=”center” custom_padding=”|||0px||” global_colors_info=”{}”][et_pb_column type=”4_4″ _builder_version=”4.16.0″ _module_preset=”default” global_colors_info=”{}”][et_pb_text _builder_version=”4.20.4″ _module_preset=”default” min_height=”239px” custom_padding=”|||1px||” inline_fonts=”Arial,Verdana” global_colors_info=”{}”]

In the field of semiconductor research, three-dimensional integrated circuits (3D ICs) have emerged as a promising solution to the constant demand for more power in a smaller package. <\/strong><\/h2>\n

But what are 3D ICs, exactly, and where is this technology headed?<\/p>\n

In general, electronic signals are transmitted faster as the density of transistors increases within a given space. For years, this meant squeezing smaller transistors into more compact footprints, but this tactic is reaching its physical limitations<\/a>.<\/p>\n

Theoretically, manufacturing larger chips would help, but this isn\u2019t a viable option for two reasons. Firstly, it\u2019s geometrically easier to fit more, smaller chips onto a silicon wafer than a handful of larger chips. Secondly, all it takes is a particle of dust to contaminate a clean room and ruin the manufacturing process; producing small batches of large chips is effectively gambling on putting all your silicon eggs in one wafer-shaped basket. Instead, manufacturing smaller chiplets<\/a> allows for little mistakes that don\u2019t impact the entire wafer.<\/p>\n

The object of the game then becomes to discover how to connect multiple chiplets as efficiently as possible to reap the same performance benefits of one big chip in a petite, budget-friendly package. Enter, die stacking technologies.<\/p>\n

<\/p>\n

The evolution of die stacking<\/strong><\/h3>\n

Die stacking has been around since the earliest multi-chip modules (MCMs) of the 1970s, but there hasn\u2019t been a need for engineers to advance this tech and make it scalable until the recent AI boom. These developments have largely been centered around the introduction of the interposer: a layer of (typically) silicon embedded with insulated copper pathways called Through-Silicon Vias (TSVs) that connect the ICs on systems in packages (SiPs).<\/p>\n

When SiPs are \u201cstacked\u201d side-by-side, they\u2019re referred to as 2.5D; when they\u2019re stacked vertically, they\u2019re referred to as 3D \u2014 however, as Dick James<\/a>, Senior Technology Analyst at Siliconics, puts it, these devices are \u201c3D, but not 3D.\u201d That title is reserved for monolithic 3D integrated circuits.<\/p>\n

\u201cCompared with TSV-based 3D ICs, monolithic or sequential 3D ICs present \u201ctrue\u201d benefits of going to the vertical dimension as the stacked layers can be connected at the transistor scale,\u201d reported a study<\/a> led by Perrine Batude of the CEA-Leti research institute in France.<\/p>\n

Francoise von Trapp, the \u201cQueen of 3D\u201d at 3DInCites<\/a> tasked herself with the duty of explaining the difference between the two categories of 3D integrated circuits on a deeper level.<\/p>\n

\u201c3D TSVs involve taking two finished device wafers (either from the same or different fabs) and vertically interconnecting them at the chip level with Through-Silicon Vias,\u201d she explains. \u201cOn the other hand, with monolithic, you never have [a] second wafer, but rather a 100nm layer of crystallized silicon, which results in a multiple order of magnitude of difference in both the size of the vias and the final device size\u2026.The end device will be smaller and thinner, [and the] interconnection is 10,000 times higher due to the number of vertical connections.\u201d<\/em><\/p>\n

Design challenges to true 3D integrated circuits<\/strong><\/h3>\n

While monolithic ICs have major performance advantages over 3D TSVs, all this power in a tiny footprint comes with a price \u2014 both literally and in the form of heat.<\/p>\n

True monolithic 3D ICs are the metropolises of semiconductors and, like all major cities, they\u2019re expensive and crowded. In the technical world, this translates to high design costs and overheating that greatly impacts efficiency. Researchers are dabbling with high thermal conductivity insulators<\/a> and configurations of atomically-thin transistors<\/a> to try to solve the overheating issue, which is why we aren\u2019t seeing true 3D integrated circuits on commercial markets, yet.<\/p>\n

Despite this unresolved solution to a complex problem<\/a>, one thing is certain: vertical stacking ICs have caught the interest of those across the industry. With major players already investing in R&D for 3D stacking technology, we will likely witness a race to see who will come out on top.<\/p>\n

<\/h2>\n

Read more:<\/strong><\/p>\n

\u25cf How Uneven Circuit Aging Impacts the Procurement of Electronic Components<\/a><\/p>\n

\u25cf Fabless OEMs Are Making Semiconductor Chips Faster And Smaller \u2014 What That Means For Organic Substrate Packaging<\/a><\/p>\n

<\/span>\u25cf <\/span><\/a>When Planning For Obsolescence, Stay Current To Stay Ahead<\/a><\/p>\n

<\/span><\/a><\/p>\n

<\/span><\/a><\/p>\n

<\/a><\/p>\n

<\/a><\/p>[\/et_pb_text][\/et_pb_column][\/et_pb_row][\/et_pb_section]\n","protected":false},"excerpt":{"rendered":"

In the field of semiconductor research, three-dimensional integrated circuits (3D ICs) have emerged as a promising solution to the constant demand for more power in a smaller package. But what are 3D ICs, exactly, and where is this technology headed? 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